The present invention relates to an active-matrix type liquid crystal display (hereinafter referred to as an LCD) apparatus in which a thin film transistor (hereinafter referred to as a TFT) is provided and to a method of driving the active-matrix type LCD apparatus, and more particularly to an LCD apparatus wherein picture quality is enhanced.
A diagram of an equivalent circuit of a TFT type liquid crystal display panel in a conventional LCD is illustrated in FIG. 5(a) and a cross-sectional view taken along a line A--A in FIG. 5(a) is illustrated in FIG. 5(b). In FIG. 5(a) and FIG. 5(b), reference numeral 1 indicates a TFT array substrate (hereinafter, referred to as an array substrate), reference numeral 2 indicates a plurality of source lines, reference numeral 3 indicates a plurality of gate lines, reference numeral 4 indicates a TFT, reference numeral 5 indicates a pixel, reference numeral 6 indicates an opposite substrate which is oppositely disposed against the array substrate 1, reference numeral 7 indicates an alignment layer (a film for alignment), reference numeral 8 indicates a liquid crystal material, reference numeral 9 indicates a sealing material, reference numeral 10 indicates a polarizer.
As shown in FIG. 5(a) and FIG. 5(b), a plurality of source lines 2 and a plurality of gate lines 3 are provided on the array substrate 1 made of a transparent material such as glass and so forth so that an electrical insulating film (not shown in FIG. 5(a) and FIG. 5(b) made of silicon nitride and so forth intervenes between a first plane on which source lines are provided and a second plane on which gate lines are provided and so that the source lines are crossed by the gate lines at right angle. The source lines and the gate lines are made of a metal such as aluminum and so forth. TFTs 4 are provided respectively at each intersecting portion at which the source line and the gate line intersect with each other to form the pixel 5. Further, the alignment layer 7 is provided over both the surface of the portion in the array substrate 1 on which a plurality of pixels 5 are provided and all the upper surface of the opposite substrate 6 which is oppositely disposed against the array substrate. The above-mentioned portion in the array substrate 1 on which a plurality of pixels are provided corresponds to a display area. The liquid crystal material 8 is sandwitched between the array substrate 1 and the opposite substrate 6. Then the clearance space between the two substrates, that is, the array substrate and the opposite substrate is sealed with the sealing material 9 to form a liquid crystal display panel. Further, the two polarizers 10 are provided respectively on each outside surface of the liquid crystal display panel.
In general, with regard to a driving technique for the above-mentioned TFT type LCD, three driving techniques with respect to applying a source voltage to be inputted to each pixel are proposed. Each schematic diagram for illustrating such three driving techniques is shown respectively in FIG. 6(a), FIG. 6(b) and FIG. 6(c). In FIG. 6(a) through FIG. 6(c), the same reference numeral indicates respectively the same portion in FIG. 5(a) and FIG. 5(b). Each of FIG. 6(a), FIG. 6(b) and FIG. 6(c) shows respectively a polarity of a voltage applied to each pixel in one frame period. In the next frame period, a voltage having the opposite polarity (opposite to the above-mentioned polarity) is inputted. A polarity of a voltage means that a voltage is either positive or negative. In FIG. 6(a) through FIG. 6(c), an indication "+" means that a positive voltage is applied and an indication "-" means that a negative voltage is applied.
In a driving technique illustrated in FIG. 6(a), a voltage having the same polarity (for example, a positive voltage) is applied to each of the pixels 5 arranged in vertical direction (direction along the source line 2) and a voltage having the opposite polarity (for example, a negative voltage) is applied to each of the pixels arranged on the next line toward the horizontal direction (direction along the gate line 3). In a driving technique illustrated in FIG. 6(b), a voltage having the same polarity is applied to each of the pixels arranged in horizontal direction (direction along the gate line 3) and a voltage having the opposite polarity (opposite to the above-mentioned polarity with respect to FIG. 6 (b)) is applied to each of the pixels arranged on the next row toward vertical direction (direction along the source line 2). Further, in a driving technique illustrated in FIG. 6(c), a voltage having one polarity is applied to one pixel and a voltage having the opposite polarity is applied to pixels which are immediately adjacent to the above-mentioned one pixel on the panel with respect to FIG. 6(c). As described above, the reason why the polarities of the input voltages are not the same is because flickers which are derived from compensation effect caused by the voltage having the opposite polarity, and variation in luminance are intended to be decreased.
FIG. 7 is an equivalent circuit diagram illustrating in detail the TFT type LCD shown in FIG. 5. In general, the TFT 4 is provided one by one in each of the pixels each of which is defined as an area which is formed by being divided by gate lines GL.sub.1, GL.sub.2, . . . , GL.sub.m (m is an integer) and source lines SL.sub.1, SL.sub.2, . . . , SL.sub.n (n is an integer) intersecting to the gate lines. The TFT 4 is controlled by on-off control. The integer m is 600 and the integer n is 2400. The liquid crystal material is driven by charging a source voltage to a pixel electrode which is connected to a drain electrode in a TFT 4. The pixel electrode is connected to a common electrode, namely, COML through a layer comprising the liquid crystal material. Further, the pixel electrode is also connected to a storage capacitance electrode CSL.sub.1 through a storage capacitance. The storage capacitance Cst is a capacitance for retaining storaged on a pixel electrode and is formed by an insulating layer between the pixel electrode and the storage capacitance electrode. A voltage applied to a drain electrode, that is, a drain voltage is retained by the storage capacitance Cst and by a liquid crystal material capacitance Cl c till the next charging is performed and the drain voltage drives the liquid crystal material. The storage capacitance electrode CSL.sub.1 is provided along the horizontal direction, that is, parallel to the gate line. Each of the gate lines GL .sub.1, GL.sub.2, . . . , GL.sub.m is connected to an output terminal of a driving IC independently with each other; each of the source lines SL.sub.1, SL.sub.2, . . . , SL.sub.n is connected to an output terminal of a driving IC independently with each other; storage capacitance electrodes CSL.sub.1 are connected outside of a display area. A driving technique wherein a voltage having the same polarity is applied to each of the pixels arranged in horizontal direction (direction along the gate line 3) and a voltage having the opposite polarity (opposite to the above-mentioned polarity with respect to FIG. 6(b)) is applied to each of the pixels arranged on the next row toward vertical direction (direction along the source line 2) is illustrated referring to FIG. 6(b) and is hereinafter referred to as a line inversion driving technique. On the other hand, a technique wherein voltages to be inputted to the storage capacitance electrode and to the opposite electrode both illustrated in FIG. 7 are set at the same frequency and are set at the inversion phase to each other, is hereinafter referred to as a common inversion driving technique. The common inversion driving technique can be incorporated into the line inversion driving technique. The combined driving technique is hereinafter referred to as a line common inversion driving technique. According to the line common inversion driving technique, a source driving voltage can be decreased with the aid of a voltage appearing at the storage capacitance electrode (hereinafter, referred to as a storage voltage capacitance voltage) and with the aid of the voltage applied to the opposite electrode. The polarity of the storage capacitance voltage is inversed to the opposite polarity in each period for gate selecting (hereinafter, referred to as a gate selecting period). Accordingly, an inexpensive driving IC for a source electrode with a low driving voltage can be adopted and the power consumption can be decreased.
Waveforms of the source voltage, of the gate voltage, of the drain voltage and of the storage capacitance electrode voltage are shown respectively in FIG. 8(a) through FIG. 8(g). In FIG. 8(a) through FIG. 8(g), the source voltage is inversed alternately in each gate selecting period. The source voltage is illustrated in FIG. 8(a). If the gate voltage is ON-state (the gate voltage is Vg.sup.+ state), the source voltage is applied to the drain electrode by an ON-state current of the TFT corresponded to the drain electrode. A characteristic wherein such voltage applied to the drain electrode, that is, the drain voltage increases within a certain period is in general referred to as a charging characteristic concerning the TFT. In FIG. 8(b) through FIG. 8(e), supposing that n represents a positive integer, concerning both a pixel on the n-th gate line (hereinafter referred to as an n line) and a pixel on the (n+1)-th gate line (hereinafter referred to as an (n+1) line), the gate voltages applied to the above-mentioned two pixels respectively and the drain voltages applied to the above-mentioned two pixels respectively are illustrated. If a gate voltage is inputted to the n line (see FIG. 8(b)), for example, a positive voltage is inputted as the drain voltage for the n line, as shown in FIG. 8(c). A gate voltage shown in FIG. 8(d) is applied to as a drain voltage inputted into the (n+1) line and at the same time, a negative voltage having the polarity opposite to the n line, as shown in FIG. 8(e) is applied, since the line inversion driving technique is adopted. Thus, since the liquid crystal display apparatus illustrated in FIG. 8(a) through FIG. 8(g) adopts the line inversion driving technique, concerning two pixels immediately adjacent to each other among pixels arranged in vertical direction, a given voltage is applied to one pixel and a given voltage having the polarity opposite to the above is applied to the other. After that, each voltage is retained till in turn the each opposite voltage is applied after one frame period. So as to explain simply, the description of a waveform fluctuation caused under the influence of a parasitic capacitance Cgd between the gate electrode and the drain electrode shown in FIG. 7 and the influence of a parasitic capacitance Cdsb between the drain electrode and the source electrode is omitted. Further, the voltage inputted to the opposite electrode is direct current (not shown in Figures).
An expression "to charge" represents "to apply a second voltage to an electrode which is kept at a first voltage", where the second voltage can be usually positive and can be occasionally negative. Accordingly, the expression "to charge" is employed in both cases; the first case is that the first voltage is higher than the second voltage and the second case is that the first voltage is lower than the second voltage.
Since a storage capacitance electrode CSL.sub.1 is coupled to the drain electrode in the TFT 4 through the storage capacitance Cst, as shown in FIG. 7, a waveform of a storage capacitance voltage is distorted under a coupling effect from the drain voltage, as the waveform of the storage capacitance electrode voltage is shown in FIG. 8(f) and FIG. 8(g). Firstly, in a gate-on period, a storage capacitance voltage (n line) increases with a drain voltage or decreases with a drain voltage (n+1 line). Since charging a drain electrode is completed at the conclusion of the gate-on period (a gate-on period in which the gate voltage is Vg.sup.+, a gate-on period is also referred to as a gate selecting period), the storage capacitance voltage is varied decreased by an amount of storage capacitance electrode against an input voltage at the instant when the gate electrode becomes OFF-state. After that, the storage capacitance voltage is recovered up to the input voltage at the gate-off state. Since during the gate until period the TFT is kept at a high resistance state, the drain voltage is varied under a coupling effect from fluctuation of the storage capacitance electrode voltage. Accordingly, there is a problem that the drain voltage decreases with the storage capacitance electrode voltage (n line) and increases with the storage capacitance electrode voltage (n+1 line) and as a result a crosstalk occurs.
Next, a mechanism wherein a horizontal crosstalk occurs under the influence of fluctuation of a voltage appeared by a coupling capacitance is illustrated referring to FIG. 9(a) through FIG. 9(f). FIG. 9(a) illustrates a plan view of a test-pattern. A case wherein a pattern C represents a test pattern of black display on a display screen of which the background is gray is explained hereinafter. Since all the pixels on one gate line are connected, as shown in FIG. 7, to one storage capacitance electrode, with respect to storage capacitances arranged along a horizontal direction, if a test-pattern shown in FIG. 9(a) is displayed, a distortion of a voltage wavefrom at a position A and a distortion of a voltage waveform at a position B vary to each other. This variation results in a difference in luminance between the position A and the position B and appears to be a horizontal crosstalk visually. A voltage at the position A and a voltage at the position B to display this test pattern is explained hereinafter. A displaying mode for a liquid crystal display panel is supposed to be normally white mode. Further, a pixel electrode on the position B is at the upper position than a pixel electrode on the position A and connected to one source line commonly.
FIG. 9(b) illustrates a source voltage in black display and FIG. 9(c) illustrates a source voltage in gray display. As is shown in FIG. 9(b) and FIG. 9(c), a voltage of an amplitude of a source signal in black display is larger than a voltage of an amplitude of a source signal in gray display. Accordingly, with respect to a voltage applied to pixel electrodes P.sub.11 and P.sub.12 and so on connected to one storage capacitance electrode through a storage capacitance, a voltage storage capacitance electrode at the position A is larger than a voltage at the position B. FIG. 9(d) illustrates a storage capacitance electrode voltage at the position B, similarly, FIG. 9(e) illustrates a storage capacitance voltage at the position A. Further, FIG. 9(f) illustrates a drain voltage at the position A and a drain voltage at the position B. As a result, a fluctuation of a storage capacitance electrode voltage at the position A (see FIG. 9(e)) is larger than a fluctuation of a storage capacitance electrode voltage at the position B. Further, a drain voltage achieved after being varied under the coupling effect caused by the fluctuation of the storage capacitance electrode voltage is varied. In this case, since if a positive voltage is applied, a finally achieved drain voltage at the position A (shown with a full line in FIG. 9(f)) is lower than a finally achieved drain voltage at the position B (shown with a dashed line in FIG. 9(f)), a voltage to be applied to the layer comprising the liquid crystal material also becomes lower, and a brightness of display at the position A gets brighter than a brightness of display at the position B.
Similarly, with a test pattern of white on the diaplay screen of which the background is gray, since a fluctuation of a storage capacitance voltage at the position A is smaller than a fluctuation of a storage capacitance voltage at the positon B, and a finally achieved drain voltage at the position A is higher than a finally achieved drain voltage at the position B, a brightness of display gets dark. Further, also in driving by line common inversion driving technique, the same fluctuation of a voltage occurs as in driving by line inversion technique.
As described above, the cause of a horizontal crosstalk occurring in a conventional TFT type liquid crystal display panel is fluctuation of a storage capacitance voltage. So as to reduce the fluctuation of the storage capacitance electrode voltage, two ideas are suggested, that is, one idea is that a value of a storage capacitance is lowered and another idea is that recovery from the varied state is made faster by lowering the resistance of the storage capacitance electrode. However, since reducing the storage capacitance leads to deterioration of the characteristic of retaining a voltage applied to the liquid crystal material and also leads to increment of an influence of parasitic capacitances Cgd and Cdsb, the storage capacitance cannot be reduced to so small. On the other hand, since adaptable resistance values for bus line materials are limited, reducing the value of the electrical resistance of storage capacitance electrode line to be lower than the present designed value has become difficult under the circumstance that a resolution of the liquid crystal panel becomes enhanced.
It is an object of the present invention to eliminate the above-mentioned problem, and to provide a liquid crystal display apparatus capable of reducing a horizontal crosstalk and a method of driving the liquid crystal display apparatus.